1. Field of the Invention
The present invention relates generally to improvements in integrated circuits (ICs) which include digital and analog circuits fabricated on a common substrate, and more specifically to such an IC having a noise isolator provided between the digital and analog circuits to minimize cross-talk through the common substrate. An integrated circuit, which includes digital and analog circuits on the same chip or substrate, is called a mixed-mode IC.
2. Description of the Related Art
As the levels of integration in IC chips go higher, cross-talk between digital and analog circuits formed on a common substrate has become very important. As the digital circuit operates at a higher frequency, more noises are generated from the digital circuit and are undesirably transferred to the analog circuit through the common substrate. That is, the digital circuit functions as a cross-talk source and induces objectionable "substrate potential changes" which adversely affect the operations of the analog circuit. In view of the higher integration in VLSI (very large-scale integration) in recent years, it is highly desirable to provide a cross-talk source isolator between the digital and analog circuits.
Before turning to the present invention it is deemed preferable to briefly describe, with reference to FIGS. 1, 2A-2B, and 3A-3B, known techniques for reducing cross-talk between digital and analog circuits.
FIG. 1 is a schematic top plan view of an IC which includes a digital circuit 2 and an analog circuit 4 both fabricated on a common silicon substrate 6. In order to prevent the cross-talk noises, originated at the digital circuit 2, from being applied to the analog circuit 4 through the substrate 6, a cross-talk source isolator 8 is provided in the substrate 6 in a manner to surround the digital circuit 2. As an alternative, the isolator 8 may be arranged such as to surround the analog circuit 4 in lieu of the digital circuit 2.
FIG. 2A is a sectional view, taken along section line I--I of FIG. 1, showing parts of the digital and analog circuits 2 and 4 in the vicinity of the cross-talk source isolator 8 This isolator 8 surrounds a digital circuit section R1 (viz., digital circuit 2) as shown in FIG. 1. The prior art shown in FIG. 2A is disclosed in Japanese Laid-open Patent Applications Nos. 3-147668 and 3-46335 and features provision of a crosstalk source isolator (corresponding to the isolator 8) which includes a substrate contact region 10 and a metal line 12 coupled to ground. The region 10 contains the same conductive type impurity as a substrate 20 and is electrically conductive. The remaining IC elements and portions are well known in the art and will be referred to later in detail in connection with the present invention, and accordingly, only a list showing the IC elements together with the corresponding reference numerals is given below.
20: p-type silicon substrate containing a high concentration of p-type impurity and thus exhibiting a low electrical resistance; PA1 22: p-well formed in a silicon which is epitaxially grown on the substrate 20; PA1 24: element segregation layer; PA1 26: MOS gate oxide layer; PA1 28: MOS gate polycrystalline silicon; PA1 30: LDD (lightly-doped drain) region; PA1 32: source and drain region; PA1 34: MOS gate side wall; PA1 35: inter-layer insulating film; PA1 36: inter-layer insulating film; PA1 50a, 50b: source electrode; and PA1 50c, 50d: drain electrode.
The cross-talk reduction technique shown in FIG. 2A utilizes the substrate contact 10 and the metal line 12 in combination. As shown in FIG. 2B, it is assumed that two kinds of noises 11a and 11b (FIG. 2B) are generated from the digital circuit section R1. The noise 11a is successfully caught by the diffused region 10 and guided to ground. However, this prior art suffers from the problem that the noise 11b, which reaches the low resistance p-type substrate 20, is transferred to the analog circuit regions R2 by way of the substrate 20. Therefore, the prior art shown in FIG. 2A is unable to prevent the cross-talk noise which propagates deep in the substrate 20.
Another prior art technique is shown in FIG. 3A. As in the first prior art, FIG. 3A is a sectional view, taken along section line I--I of FIG. 1, showing parts of the digital and analog circuits 2 and 4 in the vicinity of the cross-talk source isolator 8. In this case, the isolator 6 comprises a dielectric member 16 provided in a trench 14 surrounding the digital circuit 2 as shown in FIG. 1. The prior art shown in FIG. 3A is disclosed in Japanese Laid-open Patent Application No. 61-248464. The remaining IC elements other than the trench 14 and the dielectric member 16 have been shown in FIG. 2A.
Although the prior art of FIG. 3A is able to prevent the cross-talk noise which does not reach the substrate 20, it can not block the cross-talk noise reaching the substrate 20. Further, when the digital circuit operates at high frequencies, the cross-talk noise (also high frequencies) passes through a parasitic capacitor 18 formed at the dielectric member 16 (FIG. 3B).
For further data of cross-talk, reference should be made to a paper entitled "A Simple Approach to Modeling Cross-talk in Integrated Circuits" by Kuntal Joadar, IEEE Journal of solid-state circuits, vol. 29. No. 10, October 1994, pages 1212-1219.